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Modern microarchitectures incorporate optimization techniques such as speculative loads and store forwarding to improve the memory bottleneck.
On the worst case performance of buddy systems
Errol L. Lloyd and Michael C. Loui · 1985
Earlier work this paper cites.
Method and apparatus for dispatching and executing a load operation to memory, February 10 1998
Jeffrey M Abramson, Haitham Akkary, Andrew F Glew, Glenn J Hinton, Kris G Konigsfeld, Paul D Madland, David B Papworth, and Michael A Fetterman · 1998
Earlier work this paper cites.
Method and apparatus for performing a store operation, April 23 2002
Jeffery M Abramson, Haitham Akkary, Andrew F Glew, Glenn J Hinton, Kris G Konigsfeld, and Paul D Madland · 2002
Earlier work this paper cites.
Understanding the Linux Virtual Memory Manager
Mel Gorman · 2004
Earlier work this paper cites.
Cache-timing attacks on aes, 2005
Daniel J Bernstein · 2005
Earlier work this paper cites.
Cache missing for fun and profit, 2005
Colin Percival · 2005
Earlier work this paper cites.
Inside intel® core microarchitecture
Jack Doweck · 2006
Earlier work this paper cites.
Resolving false dependencies of speculative load instructions, October 13 2009
Sebastien Hily, Zhongying Zhang, and Per Hammarlund · 2009
Earlier work this paper cites.
Native client: A sandbox for portable, untrusted x86 native code
Bennet Yee, David Sehr, Gregory Dardyk, J Bradley Chen, Robert Muth, Tavis Ormandy, Shiki Okasaka, Neha Narula, and Nicholas Fullagar · 2009
Earlier work this paper cites.
Collecting performance data with papi-c
Dan Terpstra, Heike Jagode, Haihang You, and Jack Dongarra · 2010
Earlier work this paper cites.
The microarchitecture of intel, amd and via cpus: An optimization guide for assembly programmers and compiler makers
Agner Fog · 2012
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Practical timing side channel attacks against kernel space aslr
Ralf Hund, Carsten Willems, and Thorsten Holz · 2013
Earlier work this paper cites.
Counter-based memory disambiguation techniques for selectively predicting load/store conflicts, October 1 2013
Evgeni Krimer, Guillermo Savransky, Idan Mondjak, and Jacob Doweck · 2013
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“ooh aah… just a little bit” : A small amount of side channel can go a long way
Naomi Benger, Joop van de Pol, Nigel P. Smart, and Yuval Yarom · 2014
Earlier work this paper cites.
ret2dir: Rethinking kernel isolation
Vasileios P Kemerlis, Michalis Polychronakis, and Angelos D Keromytis · 2014
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Flipping bits in memory without accessing them: An experimental study of dram disturbance errors
Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, and Onur Mutlu · 2014
Earlier work this paper cites.
S$a: A shared cache attack that works across cores and defies vm sandboxing – and its application to aes
Gorka Irazoqui, Thomas Eisenbarth, and Berk Sunar · 2015
Earlier work this paper cites.
Systematic reverse engineering of cache slice selection in intel processors
Gorka Irazoqui, Thomas Eisenbarth, and Berk Sunar · 2015
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Last-level cache side-channel attacks are practical
Fangfei Liu, Yuval Yarom, Qian Ge, Gernot Heiser, and Ruby B. Lee · 2015
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The spy in the sandbox: Practical cache attacks in javascript and their implications
Yossef Oren, Vasileios P. Kemerlis, Simha Sethumadhavan, and Angelos D. Keromytis · 2015
Earlier work this paper cites.
Exploiting the dram rowhammer bug to gain kernel privileges
Mark Seaborn and Thomas Dullien · 2015
Earlier work this paper cites.
Anvil: Software-based protection against next-generation rowhammer attacks
Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna Das, Matthew Hicks, Yossi Oren, and Todd Austin · 2016
Cited alongside, same era.
Real time detection of cache-based side-channel attacks using hardware performance counters
Marco Chiappetta, Erkay Savas, and Cemal Yilmaz · 2016
Cited alongside, same era.
Jump over aslr: Attacking branch predictors to bypass aslr
Dmitry Evtyushkin, Dmitry Ponomarev, and Nael Abu-Ghazaleh · 2016
Cited alongside, same era.
Prefetch side-channel attacks: Bypassing smap and kernel aslr
Daniel Gruss, Clémentine Maurice, Anders Fogh, Moritz Lipp, and Stefan Mangard · 2016
Cited alongside, same era.
Rowhammer.js: A remote software-induced fault attack in javascript
Daniel Gruss, Clémentine Maurice, and Stefan Mangard · 2016
Cited alongside, same era.
Shared memory: Side-channel information leaks, 2016
A systematic evaluation of transient execution attacks and defenses
Claudio Canella, Jo Van Bulck, Michael Schwarz, Moritz Lipp, Benjamin von Berg, Philipp Ortner, Frank Piessens, Dmitry Evtyushkin, and Daniel Gruss · 2018
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Sgxpectre attacks: Stealing intel secrets from sgx enclaves via speculative execution
Guoxing Chen, Sanchuan Chen, Yuan Xiao, Yinqian Zhang, Zhiqiang Lin, and Ten H Lai · 2018
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Grand pwning unit: Accelerating microarchitectural attacks with the gpu
Pietro Frigo, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi · 2018
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Drive-by key-extraction cache attacks from portable code
Daniel Genkin, Lev Pachmanov, Eran Tromer, and Yuval Yarom · 2018
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Another flip in the wall of rowhammer defenses
Daniel Gruss, Moritz Lipp, Michael Schwarz, Daniel Genkin, Jonas Juffinger, Sioli O’Connell, Wolfgang Schoechl, and Yuval Yarom · 2018
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Lars T Hansen · 2016
Cited alongside, same era.
Cache attacks enable bulk key recovery on the cloud
Mehmet Sinan İnci, Berk Gulmezoglu, Gorka Irazoqui, Thomas Eisenbarth, and Berk Sunar · 2016
Cited alongside, same era.
Breaking kernel address space layout randomization with intel tsx
Yeongjin Jang, Sangho Lee, and Taesoo Kim · 2016
Cited alongside, same era.
Store forwarding for data caches, November 29 2016
Steffen Kosinski, Fernando Latorre, Niranjan Cooray, Stanislav Shwartsman, Ethan Kalifon, Varun Mohandru, Pedro Lopez, Tom Aviram-Rosenfeld, Jaroslav Topp, Li-Gao Zei, et al · 2016
Cited alongside, same era.
Armageddon: Cache attacks on mobile devices
Moritz Lipp, Daniel Gruss, Raphael Spreitzer, Clémentine Maurice, and Stefan Mangard · 2016
Cited alongside, same era.
"make sure dsa signing exponentiations really are constant-time"
Cesar Pereida García, Billy Bob Brumley, and Yuval Yarom · 2016
Cited alongside, same era.
Drama: Exploiting dram addressing for cross-cpu attacks
Peter Pessl, Daniel Gruss, Clémentine Maurice, Michael Schwarz, and Stefan Mangard · 2016
Cited alongside, same era.
Later among the works it cites.
speculative execution, variant 4: speculative store bypass, 2018
Jann Horn · 2018
Later among the works it cites.
Spectre attacks: Exploiting speculative execution
Paul Kocher, Daniel Genkin, Daniel Gruss, Werner Haas, Mike Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher, Michael Schwarz, and Yuval Yarom · 2018
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Meltdown: Reading kernel memory from user space
Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Anders Fogh, Jann Horn, Stefan Mangard, Paul Kocher, Daniel Genkin, Yuval Yarom, and Mike Hamburg · 2018
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ret2spec: Speculative execution using return stack buffers
Giorgi Maisuradze and Christian Rossow · 2018
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http://www.cs.cmu.edu/˜410-f10/doc/Intel_Reordering_318147.pdf , 2008
Intel 64 Architecture Memory Ordering White Paper · 2018
Later among the works it cites.
Memjam: A false dependency attack against constant-time crypto implementations in SGX
Ahmad Moghimi, Thomas Eisenbarth, and Berk Sunar · 2018
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Lazyfp: Leaking fpu register state using microarchitectural side-channels
Julian Stecklina and Thomas Prescher · 2018
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Microarchitectural minefields: 4k-aliasing covert channel and multi-tenant detection in iaas clouds
Dean Sullivan, Orlando Arias, Travis Meade, and Yier Jin · 2018
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Throwhammer: Rowhammer attacks over the network and defenses
Andrei Tatar, Radhesh Krishnan, Elias Athanasopoulos, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi · 2018
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Foreshadow: Extracting the keys to the intel sgx kingdom with transient out-of-order execution
Jo Van Bulck, Marina Minkin, Ofir Weisse, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Thomas F Wenisch, Yuval Yarom, and Raoul Strackx · 2018
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Nemesis: Studying microarchitectural timing leaks in rudimentary cpu interrupt logic
Jo Van Bulck, Frank Piessens, and Raoul Strackx · 2018
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Theory and practice of finding eviction sets
Pepe Vila, Boris Köpf, and José Francisco Morales · 2018
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Ivy Bridge - Microarchitectures - Intel
WikiChip · 2019
Closest in time.
Kaby Lake - Microarchitectures - Intel
WikiChip · 2019
Closest in time.
Skylake (client) - Microarchitectures - Intel
WikiChip · 2019
Closest in time.