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Since the advent of SPECTRE, a number of countermeasures have been proposed and deployed.
G. Barthe, P. R. D’Argenio, and T. Rezk, “Secure information flow by self-composition,” in Proceedings of the 17th IEEE Workshop on Computer Security Foundations , ser. CSFW ’04. IEEE, 2004
2004
Earlier work this paper cites.
D. Molnar, M. Piotrowski, D. Schultz, and D. A. Wagner, “The program counter security model: Automatic detection and removal of control-flow side channel attacks,” in Proceedings of the 8th International Conference on Information Security and Cryptology , ser. ICISC ’05. Springer, 2005
2005
Earlier work this paper cites.
A. R. Bradley and Z. Manna, The calculus of computation: decision procedures with applications to verification . Springer, 2007
2007
Earlier work this paper cites.
L. M. de Moura and N. Bjørner, “Z3: An Efficient SMT Solver,” in Proceedings of the 14th International Conference on Tools and Algorithms for the Construction and Analysis of Systems , ser. TACAS ’08. Springer, 2008
2008
Earlier work this paper cites.
A. Sabelfeld and D. Sands, “Declassification: Dimensions and principles,” Journal of Computer Security , vol. 17, no. 5, 2009
2009
Earlier work this paper cites.
J. L. Hennessy and D. A. Patterson, Computer architecture: a quantitative approach . Elsevier, 2011
2011
Earlier work this paper cites.
M. V. Hermenegildo, F. Bueno, M. Carro, P. López, E. Mera, J. Morales, and G. Puebla, “An Overview of Ciao and its Design Philosophy,” Theory and Practice of Logic Programming , vol. 12, no. 1–2, 2012
2012
Earlier work this paper cites.
U. Degenbaev, “Formal specification of the x86 instruction set architecture,” Ph.D. dissertation, Universität des Saarlandes, 2012
2012
Earlier work this paper cites.
G. Doychev, B. Köpf, L. Mauborgne, and J. Reineke, “CacheAudit: A tool for the static analysis of cache side channels,” ACM Transactions on Information and System Security (TISSEC) , vol. 18, no. 1, 2015
2015
Earlier work this paper cites.
J. B. Almeida, M. Barbosa, G. Barthe, F. Dupressoir, and M. Emmi, “Verifying constant-time implementations,” in Proceedings of the 25th USENIX Security Symposium , ser. USENIX Security ’16. USENIX Association, 2016
2016
Earlier work this paper cites.
I. Anati, D. Blythe, J. Doweck, H. Jiang, W. Kao, J. Mandelblat, L. Rappoport, E. Rotem, and A. Yasin, “Inside 6th gen intel core: New microarchitecture code named Skylake,” in Proceedings of the 28th IEEE Hot Chips Symposium , ser. HCS ’16, 2016
2016
Earlier work this paper cites.
S. Goel, W. A. Hunt, and M. Kaufmann, Engineering a Formal, Executable x86 ISA Simulator for Software Verification . Springer, 2017
2017
Earlier work this paper cites.
G. Doychev and B. Köpf, “Rigorous Analysis of Software Countermeasures against Cache Attacks,” in Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation , ser. PLDI ’17. ACM, 2017
2017
Earlier work this paper cites.
G. Maisuradze and C. Rossow, “Ret2Spec: Speculative Execution Using Return Stack Buffers,” in Proceedings of the 25th ACM SIGSAC Conference on Computer and Communications Security , ser. CCS ’18. ACM, 2018
2018
Earlier work this paper cites.
2018
Cited alongside, same era.
E. M. Koruyeh, K. N. Khasawneh, C. Song, and N. Abu-Ghazaleh, “Spectre returns! speculation attacks using the return stack buffer,” in Proceedings of the 12th USENIX Workshop on Offensive Technologies , ser. WOOT ’18. USENIX Association, 2018
2018
Cited alongside, same era.
2018
Cited alongside, same era.
Intel, “Intel Analysis of Speculative Execution Side Channels,” https://software.intel.com/sites/default/files/managed/b9/f9/336983-Intel-Analysis-of-Speculative-Execution-Side-Channels-White-Paper.pdf
2018
Cited alongside, same era.
2018
Closest in time.
Advanced Micro Devices, Inc., “Software techniques for managing speculation on amd processors,” https://developer.amd.com/wp-content/resources/90343-B_SotwareTechniquesforManagingSpeculation_WP_7-18Update_FNL.pdf
2018
Closest in time.
2018
Closest in time.
R. Zhang, C. Deutschbein, P. Huang, and C. Sturton, “End-to-end automated exploit generation for validating the security of processor designs,” in Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture , ser. MICRO ’18. IEEE/ACM, 2018
2018
Closest in time.
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F. Pizlo, “What Spectre and Meltdown mean for WebKit,” https://webkit.org/blog/8048/what-spectre-and-meltdown-mean-for-webkit/
2018
Cited alongside, same era.
C. Carruth, “Speculative load hardening,” https://llvm.org/docs/SpeculativeLoadHardening.html
2018
Cited alongside, same era.
Intel, “Using Intel Compilers to Mitigate Speculative Execution Side-Channel Issues,” https://software.intel.com/en-us/articles/using-intel-compilers-to-mitigate-speculative-execution-side-channel-issues
2018
Cited alongside, same era.
A. Pardoe, “Spectre mitigations in MSVC,” https://blogs.msdn.microsoft.com/vcblog/2018/01/15/spectre-mitigations-in-msvc/
2018
Cited alongside, same era.
2018
Cited alongside, same era.
P. Kocher, “Spectre mitigations in Microsoft’s C/C++ compiler,” https://www.paulkocher.com/doc/MicrosoftCompilerSpectreMitigation.html
2018
Cited alongside, same era.
M. Miller, “Mitigating speculative execution side channel hardware vulnerabilities,” https://blogs.technet.microsoft.com/srd/2018/03/15/mitigating-speculative-execution-side-channel-hardware-vulnerabilities/
2018
Cited alongside, same era.
J. Horn, “CVE-2018-3639 - speculative store bypass,” https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639
2018
Cited alongside, same era.
P. Kocher, J. Horn, A. Fogh, D. Genkin, D. Gruss, W. Haas, M. Hamburg, M. Lipp, S. Mangard, T. Prescher, M. Schwarz, and Y. Yarom, “Spectre Attacks: Exploiting Speculative Execution,” in Proceedings of the 40th IEEE Symposium on Security and Privacy , ser. S&P ’19. IEEE, 2019
2019
Closest in time.
C. Canella, J. Van Bulck, M. Schwarz, M. Lipp, B. von Berg, P. Ortner, F. Piessens, D. Evtyushkin, and D. Gruss, “A Systematic Evaluation of Transient Execution Attacks and Defenses,” in Proceedings of the 28th USENIX Security Symposium , ser. USENIX Security ’19. USENIX Association, 2019
2019
Closest in time.
G. Chen, S. Chen, Y. Xiao, Y. Zhang, Z. Lin, and T. H. Lai, “Stealing intel secrets from SGX enclaves via speculative execution,” in Proceedings of the 4th IEEE European Symposium on Security and Privacy , ser. EuroS&P ’19. IEEE, 2019
2019
Closest in time.
M. Taram, A. Venkat, and D. M. Tullsen, “Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization,” in Proceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems , ser. ASPLOS ’19, 2019
2019
Closest in time.
C. Disselkoen, R. Jagadeesan, A. Jeffrey, and J. Riely, “Code that never ran: modeling attacks on speculative evaluation,” in Proceedings of the 40th IEEE Symposium on Security and Privacy , ser. S&P ’19. IEEE, 2019
2019
Closest in time.
2019
Closest in time.
K. Cheang, C. Rasmussen, S. A. Seshia, and P. Subramanyan, “A formal approach to secure speculation,” in Proceedings of the 32nd IEEE Computer Security Foundations Symposium , ser. CSF ’19, 2019
2019
Closest in time.
A. Armstrong, T. Bauereiss, B. Campbell, A. Reid, K. E. Gray, R. M. Norton, P. Mundkur, M. Wassell, J. French, C. Pulte, S. Flur, I. Stark, N. Krishnaswami, and P. Sewell, “ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS,” Proceedings of the ACM on Programming Languages , vol. 3, no. POPL, 2019
2019
Closest in time.