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Securing critical assets in a bus-based System-On-Chip (SoC) is imperative to mitigate potential vulnerabilities and prevent unauthorized access, ensuring the integrity, availability, and confidentiality of the system.
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K. Nienhuis, A. Joannou, T. Bauereiss, A. Fox, M. Roe, B. Campbell, M. Naylor, R. M. Norton, S. W. Moore, P. G. Neumann, I. Stark, R. N. M. Watson, and P. Sewell, “Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process,” in 2020 IEEE Symposium on Security and Privacy (SP) , 2020, pp. 1003–1020
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H. Ahmad, Y. Huang, and W. Weimer, “CirFix: Automatically Repairing Defects in Hardware Design Code,” in Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems , ser. ASPLOS ’22. New York, NY, USA: Association for Computing Machinery, 2022, p. 990–1003. https://doi.org/10.1145/3503222.3507763
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R. Kande, A. Crump, G. Persyn, P. Jauernig, A.-R. Sadeghi, A. Tyagi, and J. Rajendran, “TheHuzz: Instruction fuzzing of processors using Golden-Reference models for finding Software-Exploitable vulnerabilities,” in 31st USENIX Security Symposium (USENIX Security 22) . Boston, MA: USENIX Association, Aug. 2022, pp. 3219–3236. https://www.usenix.org/conference/usenixsecurity22/presentation/kande
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2022
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B. Ahmad, S. Thakur, B. Tan, R. Karri, and H. Pearce, “Fixing Hardware Security Bugs with Large Language Models,” 2023
2023
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S. Paria and S. Bhunia, “DiSPEL: Distributed Security Policy Enforcement for Bus-based SoC,” 2023
2023
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