Fetching the paper…
Reading the bibliography…
Analog hardware implemented deep learning models are promising for computation and energy constrained systems such as edge computing devices.
1904
Earlier work this paper cites.
1906
Earlier work this paper cites.
J. Sietsma and R. J. Dow, “Creating artificial neural networks that generalize,” Neural Networks , vol. 4, no. 1, pp. 67 – 79, 1991. [Online]. Available: http://www.sciencedirect.com/science/article/pii/0893608091900332
1991
Earlier work this paper cites.
A. F. Murray and P. J. Edwards, “Enhanced mlp performance and fault tolerance resulting from synaptic weight noise during training,” IEEE Transactions on Neural Networks , vol. 5, no. 5, pp. 792–802, 1994
1994
Earlier work this paper cites.
C. M. Bishop, “Training with noise is equivalent to tikhonov regularization,” Neural Computation , vol. 7, no. 1, pp. 108–116, 1995
1995
Earlier work this paper cites.
I. Bayraktaroglu, A. S. Ogrenci, G. Dundar, S. Balkir, and E. Alpaydin, “Annsys (an analog neural network synthesis system),” in Proceedings of International Conference on Neural Networks (ICNN’97) , vol. 2, 1997, pp. 910–915 vol.2
1997
Earlier work this paper cites.
G. M. Bo, D. D. Caviglia, and M. Valle, “An on-chip learning neural network,” in Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks. IJCNN 2000. Neural Computing: New Challenges and Perspectives for the New Millennium , vol. 4, 2000, pp. 66–71 vol.4
2000
Earlier work this paper cites.
A. Schmid, Y. Leblebici, and D. Mlynek, “Mixed analogue-digital artificial-neural-network architecture with on-chip learning,” Circuits, Devices and Systems, IEE Proceedings - , vol. 146, pp. 345 – 349, 01 2000
2000
Earlier work this paper cites.
2015
Earlier work this paper cites.
2015
Earlier work this paper cites.
Y. Wu et al. , “Tensorpack,” https://github.com/tensorpack/
2016
Earlier work this paper cites.
2016
Cited alongside, same era.
H. Noh, T. You, J. Mun, and B. Han, “Regularizing deep neural networks by noise: Its interpretation and optimization,” 2017
2017
Cited alongside, same era.
L. Ni, Z. Liu, H. Yu, and R. V. Joshi, “An energy-efficient digital reram-crossbar-based cnn with bitwise parallelism,” IEEE Journal on Exploratory Solid-State Computational Devices and Circuits , vol. 3, pp. 37–46, 2017
2017
Cited alongside, same era.
Y. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. Zhao, H. Larochelle, D. Englund, and et al., “Deep learning with coherent nanophotonic circuits,” Nature Photonics , vol. 11, no. 7, p. 441–446, Jun 2017. [Online]. Available: http://dx.doi.org/10.1038/nphoton.2017.93
2017
Cited alongside, same era.
M. J. Marinella, S. Agarwal, A. Hsia, I. Richter, R. Jacobs-Gedrim, J. Niroula, S. J. Plimpton, E. Ipek, and C. D. James, “Multiscale co-design analysis of energy, latency, area, and accuracy of a reram analog neural training accelerator,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems , vol. 8, no. 1, pp. 86–101, 2018
2018
Later among the works it cites.
2018
Later among the works it cites.
H. Li, M. Bhargav, P. N. Whatmough, and H. . Philip Wong, “On-chip memory technology design space explorations for mobile deep neural network accelerators,” in 2019 56th ACM/IEEE Design Automation Conference (DAC) , 2019, pp. 1–6
2019
Later among the works it cites.
P. Upadhyaya, X. Yu, J. Mink, J. Cordero, P. Parmar, and A. Jiang, “Error correction for hardware-implemented deep neural networks,” 2019
alphaXiv searches the wider corpus for related work and actual follow-ups.
alphaXiv is searching for related work…
G. W. Burr, R. M. Shelby, A. Sebastian, S. Kim, S. Kim, S. Sidler, K. Virwani, M. Ishii, P. Narayanan, A. Fumarola, L. L. Sanches, I. Boybat, M. L. Gallo, K. Moon, J. Woo, H. Hwang, and Y. Leblebici, “Neuromorphic computing using non-volatile memory,” Advances in Physics: X , vol. 2, no. 1, pp. 89–124, 2017
2017
Cited alongside, same era.
D. Rolnick, A. Veit, S. Belongie, and N. Shavit, “Deep learning is robust to massive label noise,” 2017
2017
Cited alongside, same era.
2017
Cited alongside, same era.
2017
Cited alongside, same era.
2017
Cited alongside, same era.
2017
Cited alongside, same era.
F. Chollet, “Training resnet models in keras.” [Online]. Available: https://github.com/keras-team/keras/blob/master/examples/cifar10_resnet.py
Cited in the paper.
2019
Later among the works it cites.
T. P. Xiao, C. H. Bennett, B. Feinberg, S. Agarwal, and M. J. Marinella, “Analog architectures for neural network acceleration based on non-volatile memory,” Applied Physics Reviews , vol. 7, no. 3, 9 2020
2020
Closest in time.
G. Charan, A. Mohanty, X. Du, G. Krishnan, R. V. Joshi, and Y. Cao, “Accurate inference with inaccurate rram devices: A joint algorithm-design solution,” IEEE Journal on Exploratory Solid-State Computational Devices and Circuits , vol. 6, no. 1, pp. 27–35, 2020
2020
Closest in time.
2020
Closest in time.
C. H. Bennett, T. P. Xiao, R. Dellana, B. Feinberg, S. Agarwal, M. J. Marinella, V. Agrawal, V. Prabhakar, K. Ramkumar, L. Hinh, and et al., “Device-aware inference operations in sonos nonvolatile memory arrays,” 2020 IEEE International Reliability Physics Symposium (IRPS) , Apr 2020. [Online]. Available: http://dx.doi.org/10.1109/IRPS45951.2020.9129313
2020
Closest in time.
S. Mittal, “A survey on modeling and improving reliability of dnn algorithms and accelerators,” Journal of Systems Architecture , vol. 104, p. 101689, 2020. [Online]. Available: http://www.sciencedirect.com/science/article/pii/S1383762119304965
2020
Closest in time.
K. Huang, P. Siegel, and A. Jiang, “Functional error correction for robust neural networks,” 2020
2020
Closest in time.