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We present GRIP, a graph neural network accelerator architecture designed for low-latency inference.
P. Shivakumar and N. P. Jouppi, “Cacti 3.0: An integrated cache timing, power, and area model,” Compaq Computer Corporation, Tech. Rep., 2001
2001
Earlier work this paper cites.
2007
Earlier work this paper cites.
T. A. Davis and Y. Hu, “The University of Florida sparse matrix collection,” ACM Transactions on Mathematical Software (TOMS) , vol. 38, no. 1, p. 1, 2011
2011
Earlier work this paper cites.
C. Farabet, B. Martini, B. Corda, P. Akselrod, E. Culurciello, and Y. LeCun, “Neuflow: A runtime reconfigurable dataflow processor for vision,” in 2011 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops (CVPR Workshops 2011) . IEEE, 2011, pp. 109–116
2011
Earlier work this paper cites.
K. Chandrasekar, C. Weis, Y. Li, S. Goossens, M. Jung, O. Naji, B. Akesson, N. Wehn, and K. Goossens, “DRAMPower: Open-source dram power & energy estimation tool,” URL: http://www.drampower.info , vol. 22, 2012
2012
Earlier work this paper cites.
T. Chen, Z. Du, N. Sun, J. Wang, C. Wu, Y. Chen, and O. Temam, “DianNao: A small-footprint high-throughput accelerator for ubiquitous machine-learning,” in Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems , ser. ASPLOS ’14. New York, NY, USA: ACM, 2014, pp. 269–284. [Online]. Available: http://doi.acm.org/10.1145/2541940.2541967
2014
Earlier work this paper cites.
Y. Chen, T. Luo, S. Liu, S. Zhang, L. He, J. Wang, L. Li, T. Chen, Z. Xu, N. Sun, and O. Temam, “DaDianNao: A machine-learning supercomputer,” in Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture , ser. MICRO-47. Washington, DC, USA: IEEE Computer Society, 2014, pp. 609–622. [Online]. Available: http://dx.doi.org/10.1109/MICRO.2014.58
2014
Earlier work this paper cites.
J. Leskovec and A. Krevl, “SNAP Datasets: Stanford large network dataset collection,” http://snap.stanford.edu/data , Jun. 2014
2014
Earlier work this paper cites.
E. Nurvitadhi, G. Weisz, Y. Wang, S. Hurkat, M. Nguyen, J. C. Hoe, J. F. Martínez, and C. Guestrin, “Graphgen: An FPGA framework for vertex-centric graph computation,” in 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines . IEEE, 2014, pp. 25–28
2014
Earlier work this paper cites.
M. Abadi, A. Agarwal, P. Barham, E. Brevdo, Z. Chen, C. Citro, G. S. Corrado, A. Davis, J. Dean, M. Devin, S. Ghemawat, I. Goodfellow, A. Harp, G. Irving, M. Isard, Y. Jia, R. Jozefowicz, L. Kaiser, M. Kudlur, J. Levenberg, D. Mané, R. Monga, S. Moore, D. Murray, C. Olah, M. Schuster, J. Shlens, B. Steiner, I. Sutskever, K. Talwar, P. Tucker, V. Vanhoucke, V. Vasudevan, F. Viégas, O. Vinyals, P. Warden, M. Wattenberg, M. Wicke, Y. Yu, and X. Zheng, “TensorFlow: Large-scale machine learning on heterogeneous systems,” 2015, software available from tensorflow.org. [Online]. Available: http://tensorflow.org/
2015
Earlier work this paper cites.
Z. Du, R. Fasthuber, T. Chen, P. Ienne, L. Li, T. Luo, X. Feng, Y. Chen, and O. Temam, “ShiDianNao: Shifting vision processing closer to the sensor,” in 2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA) , June 2015, pp. 92–104
2015
Earlier work this paper cites.
C. Zhang, P. Li, G. Sun, Y. Guan, B. Xiao, and J. Cong, “Optimizing FPGA-based accelerator design for deep convolutional neural networks,” in Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays . ACM, 2015, pp. 161–170
2015
Earlier work this paper cites.
T. J. Ham, L. Wu, N. Sundaram, N. Satish, and M. Martonosi, “Graphicionado: A high-performance and energy-efficient accelerator for graph analytics,” in 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) . IEEE, 2016, pp. 1–13
2016
Earlier work this paper cites.
Y. Kim, W. Yang, and O. Mutlu, “Ramulator: A fast and extensible dram simulator,” IEEE Computer architecture letters , vol. 15, no. 1, pp. 45–49, 2016
2016
Earlier work this paper cites.
T. Oguntebi and K. Olukotun, “Graphops: A dataflow library for graph analytics acceleration,” in Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays . ACM, 2016, pp. 111–117
2016
Earlier work this paper cites.
X. Bresson and T. Laurent, “Residual gated graph convnets,” arXiv preprint arXiv:1711.07553 , 2017
2017
Earlier work this paper cites.
Y.-H. Chen, T. Krishna, J. S. Emer, and V. Sze, “Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks,” IEEE Journal of Solid-State Circuits , vol. 52, no. 1, pp. 127–138, 2017
2017
Earlier work this paper cites.
M. Gao, J. Pu, X. Yang, M. Horowitz, and C. Kozyrakis, “TETRIS: Scalable and efficient neural network acceleration with 3d memory,” in Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems , ser. ASPLOS ’17. New York, NY, USA: ACM, 2017, pp. 751–764. [Online]. Available: http://doi.acm.org/10.1145/3037697.3037702
2017
Cited alongside, same era.
J. Gilmer, S. S. Schoenholz, P. F. Riley, O. Vinyals, and G. E. Dahl, “Neural message passing for quantum chemistry,” in Proceedings of the 34th International Conference on Machine Learning-Volume 70 . JMLR.org, 2017, pp. 1263–1272
2017
Cited alongside, same era.
W. Hamilton, Z. Ying, and J. Leskovec, “Inductive representation learning on large graphs,” in Advances in Neural Information Processing Systems , 2017, pp. 1024–1034
2017
Cited alongside, same era.
W.-L. Chiang, X. Liu, S. Si, Y. Li, S. Bengio, and C.-J. Hsieh, “Cluster-GCN: An efficient algorithm for training deep and large graph convolutional networks,” in Proceedings of the 25th ACM SIGKDD International Conference on Knowledge Discovery; Data Mining , ser. KDD ’19. New York, NY, USA: ACM, 2019, pp. 257–266. [Online]. Available: http://doi.acm.org/10.1145/3292500.3330925
2019
Later among the works it cites.
M. Gao, X. Yang, J. Pu, M. Horowitz, and C. Kozyrakis, “TANGRAM: Optimized coarse-grained dataflow for scalable NN accelerators,” in Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems , ser. ASPLOS ’19. New York, NY, USA: ACM, 2019, pp. 807–820. [Online]. Available: http://doi.acm.org/10.1145/3297858.3304014
2019
Later among the works it cites.
N. Greeneltch and J. X, “Maximize TensorFlow performance on CPU: Considerations and recommendations for inference workloads,” https://software.intel.com/en-us/articles/maximize-tensorflow-performance-on-cpu-considerations-and-recommendations-for-inference , 2019
2019
Later among the works it cites.
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alphaXiv is searching for related work…
N. P. Jouppi, C. Young, N. Patil, D. Patterson, G. Agrawal, R. Bajwa, S. Bates, S. Bhatia, N. Boden, A. Borchers, R. Boyle, P.-l. Cantin, C. Chao, C. Clark, J. Coriell, M. Daley, M. Dau, J. Dean, B. Gelb, T. V. Ghaemmaghami, R. Gottipati, W. Gulland, R. Hagmann, C. R. Ho, D. Hogberg, J. Hu, R. Hundt, D. Hurt, J. Ibarz, A. Jaffey, A. Jaworski, A. Kaplan, H. Khaitan, D. Killebrew, A. Koch, N. Kumar, S. Lacy, J. Laudon, J. Law, D. Le, C. Leary, Z. Liu, K. Lucke, A. Lundin, G. MacKean, A. Maggiore, M. Mahony, K. Miller, R. Nagarajan, R. Narayanaswami, R. Ni, K. Nix, T. Norrie, M. Omernick, N. Penukonda, A. Phelps, J. Ross, M. Ross, A. Salek, E. Samadiani, C. Severn, G. Sizikov, M. Snelham, J. Souter, D. Steinberg, A. Swing, M. Tan, G. Thorson, B. Tian, H. Toma, E. Tuttle, V. Vasudevan, R. Walter, W. Wang, E. Wilcox, and D. H. Yoon, “In-datacenter performance analysis of a tensor processing unit,” in Proceedings of the 44th Annual International Symposium on Computer Architecture , ser. ISCA ’17. New York, NY, USA: ACM, 2017, pp. 1–12. [Online]. Available: http://doi.acm.org/10.1145/3079856.3080246
2017
Cited alongside, same era.
T. N. Kipf and M. Welling, “Semi-supervised classification with graph convolutional networks,” in International Conference on Learning Representations (ICLR) , 2017
2017
Cited alongside, same era.
W. Lu, G. Yan, J. Li, S. Gong, Y. Han, and X. Li, “FlexFlow: A flexible dataflow accelerator architecture for convolutional neural networks,” in 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA) . IEEE, 2017, pp. 553–564
2017
Cited alongside, same era.
D. Marcheggiani and I. Titov, “Encoding sentences with graph convolutional networks for semantic role labeling,” in Proceedings of the 2017 Conference on Empirical Methods in Natural Language Processing . Copenhagen, Denmark: Association for Computational Linguistics, September 2017, pp. 1507–1516. [Online]. Available: https://www.aclweb.org/anthology/D17-1159
2017
Cited alongside, same era.
M. M. Ozdal, S. Yesil, T. Kim, A. Ayupov, J. Greth, S. Burns, and O. Ozturk, “Graph analytics accelerators for cognitive systems,” IEEE Micro , vol. 37, no. 1, pp. 42–51, 2017
2017
Cited alongside, same era.
S. Venkataramani, A. Ranjan, S. Banerjee, D. Das, S. Avancha, A. Jagannathan, A. Durg, D. Nagaraj, B. Kaul, P. Dubey, and A. Raghunathan, “ScaleDeep: A scalable compute architecture for learning and evaluating deep networks,” in Proceedings of the 44th Annual International Symposium on Computer Architecture , ser. ISCA ’17. New York, NY, USA: ACM, 2017, pp. 13–26. [Online]. Available: http://doi.acm.org/10.1145/3079856.3080244
2017
Cited alongside, same era.
Y. Wang, Y. Pan, A. Davidson, Y. Wu, C. Yang, L. Wang, M. Osama, C. Yuan, W. Liu, A. T. Riffel et al. , “Gunrock: GPU graph analytics,” ACM Transactions on Parallel Computing (TOPC) , vol. 4, no. 1, pp. 1–49, 2017
2017
Cited alongside, same era.
M. Allamanis, M. Brockschmidt, and M. Khademi, “Learning to represent programs with graphs,” in 6th International Conference on Learning Representations, ICLR , 2018. [Online]. Available: https://openreview.net/forum?id=BJOFETxR-
2018
Cited alongside, same era.
2018
Cited alongside, same era.
Intel Corporation, Intel Math Kernel Library. Reference Manual . Santa Clara, USA: Intel Corporation, 2019
2019
Later among the works it cites.
L. Ma, Z. Yang, Y. Miao, J. Xue, M. Wu, L. Zhou, and Y. Dai, “NeuGraph: Parallel deep neural network computation on large graphs,” in 2019 USENIX Annual Technical Conference (USENIX ATC 19) . Renton, WA: USENIX Association, Jul. 2019, pp. 443–458. [Online]. Available: https://www.usenix.org/conference/atc19/presentation/ma
2019
Later among the works it cites.
Y. Ma, H. Ren, B. Khailany, H. Sikka, L. Luo, K. Natarajan, and B. Yu, “High performance graph convolutional networks with applications in testability analysis,” in Proceedings of the 56th Annual Design Automation Conference 2019 , 2019, pp. 1–6
2019
Later among the works it cites.
NVIDIA Corporation, cuSPARSE Library . NVIDIA Corporation, 2019
2019
Later among the works it cites.
2019
Later among the works it cites.
2019
Later among the works it cites.
K. Xu, W. Hu, J. Leskovec, and S. Jegelka, “How powerful are graph neural networks?” in International Conference on Learning Representations , 2019. [Online]. Available: https://openreview.net/forum?id=ryGs6iA5Km
2019
Later among the works it cites.
Gunrock Developers, “Hive workflow report for GraphSage GPU implementation,” https://gunrock.github.io/docs/hive/hive_graphSage.html , accessed: 2020-02-20
2020
Closest in time.
Z. Huang, D. Zheng, Q. Gan, J. Zhou, and Z. Zhang, “Nodeflow and sampling,” 2019, https://doc.dgl.ai/tutorials/models/5_giant_graph/1_sampling_mx.html#nodeflow , Accessed 2020-01-01
2020
Closest in time.
A. Jain, I. Liu, A. Sarda, and P. Molino, “Food discovery with Uber Eats: Using graph learning to power recommendations,” https://eng.uber.com/uber-eats-graph-learning/ , accessed: 2020-02-20
2020
Closest in time.
K. Kiningham, P. Levis, and C. Re, “GReTA: Hardware Optimized Graph Processing for GNNs,” in Proceedings of the Workshop on Resource-Constrained Machine Learning (ReCoML 2020) , March 2020
2020
Closest in time.
M. Yan, L. Deng, X. Hu, L. Liang, Y. Feng, X. Ye, Z. Zhang, D. Fan, and Y. Xie, “HyGCN: A GCN accelerator with hybrid architecture.” IEEE, 2020
2020
Closest in time.
H. Zeng and V. Prasanna, “GraphACT: Accelerating GCN training on CPU-FPGA heterogeneous platforms,” in The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays , 2020, pp. 255–265
2020
Closest in time.