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Recent technological advances have proliferated the available computing power, memory, and speed of modern Central Processing Units (CPUs), Graphics Processing Units (GPUs), and Field Programmable Gate Arrays (FPGAs).
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2010
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M. Courbariaux, Y. Bengio, and J.-P. David, “Binaryconnect: Training deep neural networks with binary weights during propagations,” in
2015
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2016
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H. Wang, B. Raj, and E. P. Xing, “On the origin of deep learning,”
2017
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D. Wang, K. Xu, and D. Jiang, “PipeCNN: An OpenCL-based open-source FPGA accelerator for convolution neural networks,” in
2017
Cited alongside, same era.
2017
Cited alongside, same era.
Cited in the paper.
A. Krizhevsky, V. Nair, and G. Hinton, “Cifar-10 (canadian institute for advanced research).” [Online]. Available: http://www.cs.toronto.edu/ kriz/cifar.html
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C. Sakr, J. Choi, Z. Wang, K. Gopalakrishnan, and N. R. Shanbhag, “True gradient-based training of deep binary activated neural networks via continuous binarization,”
2018
Later among the works it cites.
L. Yang, Z. He, and D. Fan, “A fully onchip binarized convolutional neural network fpga impelmentation with accurate inference,” in
2018
Later among the works it cites.
C. Lammie and M. R. Azghadi, “Stochastic Computing for Low-Power and High-Speed Deep Learning on FPGA,” in
2019
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