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NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades.
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K. K. Chang, A. Kashyap, H. Hassan, S. Ghose, K. Hsieh, D. Lee, T. Li, G. Pekhimenko, S. Khan, and O. Mutlu, “Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization,” in SIGMETRICS , 2016
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Y. Cai, S. Ghose, Y. Luo, K. Mai, O. Mutlu, and E. F. Haratsch, “Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques,” in HPCA , 2017
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K. K. Chang, A. G. Yaglikci, A. Agrawal, N. Chatterjee, S. Ghose, A. Kashyap, H. Hassan, D. Lee, M. O’Connor, and O. Mutlu, “Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms,” in SIGMETRICS , 2017
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J. Elliott and J. Jeong, “Advancements in SSDs and 3D NAND Reshaping Storage Market,” Keynote presentation at Flash Memory Summit , 2017
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2017
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H. Hassan, N. Vijaykumar, S. Khan, S. Ghose, K. Chang, G. Pekhimenko, D. Lee, O. Ergin, and O. Mutlu, “SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies,” in HPCA , 2017
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J. He, S. Kannan, A. C. Arpaci-Dusseau, and R. H. Arpaci-Dusseau, “The Unwritten Contract of Solid State Drives,” in EuroSys , 2017
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C. Kim et al. , “A 512Gb 3b/Cell 64-Stacked WL 3D V-NAND Flash Memory,” in ISSCC , 2017
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D. Lee, S. Khan, L. Subramanian, S. Ghose, R. Ausavarungnirun, G. Pekhimenko, V. Seshadri, and O. Mutlu, “Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms,” in SIGMETRICS , 2017
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S.-Y. Lee, “Limitations of 3D NAND Scaling,” EE Times, 2017
2017
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Y. Li, S. Ghose, J. Choi, J. Sun, H. Wang, and O. Mutlu, “Utility-Based Hybrid Memory Management,” in CLUSTER , 2017
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2017
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R. Micheloni, S. Aritome, and L. Crippa, “Array Architectures for 3-D NAND Flash Memories,” Proc. IEEE , Sep. 2017
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M. Patel, J. S. Kim, and O. Mutlu, “The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions,” in ISCA , 2017
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Samsung Electronics Co., Ltd., Samsung SSD 960 PRO M.2 Data Sheet Rev. 1.1 , 2017
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Toshiba Corp., “3D Flash Memory: Scalable, High Density Storage for Large Capacity Applications,” http://www.toshiba.com/taec/adinfo/technologymoves/3d-flash.jsp , 2017
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Y. Wu, Y. Cai, and E. F. Haratsch, “Fixed Point Conversion of LLR Values Based on Correlation,” U.S. Patent 9,582,361, 2017
2017
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Y. Wu, Y. Cai, and E. F. Haratsch, “Systems and Methods for Soft Data Utilization in a Solid State Memory System,” U.S. Patent 9,201,729, 2017
2017
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J. H. Yoon, R. Godse, G. Tressler, and H. Hunter, “3D-NAND Scaling and 3D-SCM — Implications to Enterprise Storage,” in Flash Memory Summit , 2017
2017
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X. Yu, C. J. Hughes, N. Satish, O. Mutlu, and S. Devadas, “Banshee: Bandwidth-Efficient DRAM Caching via Software/Hardware Cooperation,” in MICRO , 2017
2017
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J. S. Kim, M. Patel, H. Hassan, and O. Mutlu, “The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency–Reliability Tradeoff in Modern DRAM Devices,” in HPCA , 2018
2018
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Y. Luo, S. Ghose, Y. Cai, E. F. Haratsch, and O. Mutlu, “HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness,” in HPCA , 2018
2018
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