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ChIRAAG: ChatGPT Informed Rapid and Automated Assertion Generation · Around

2024

ChIRAAG: ChatGPT Informed Rapid and Automated Assertion Generation

Mali, Bhabesh, Maddala, Karthik, Gupta, Vatsal et al.

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System Verilog Assertion (SVA) formulation -- a critical yet complex task is a prerequisite in the Assertion Based Verification (ABV) process.

Traditionally, SVA formulation involves expert-driven interpretation of specifications, which is time-consuming and prone to human error.
Recently, LLM-informed automatic assertion generation is gaining interest.
We designed a novel framework called ChIRAAG, based on OpenAI GPT4, to generate SVA from natural language specifications of a design.

Built on

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M. Chen et al. , “Evaluating large language models trained on code,” arXiv preprint arXiv:2107.03374 , 2021
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Then

Y. Deng et al. , “Large language models are edge-case fuzzers: Testing deep learning libraries via fuzzgpt,” arXiv preprint arXiv:2304.02014 , 2023
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H. Witharana et al. , “Automated generation of security assertions for rtl models,” ACM Journal on Emerging Technologies in Computing Systems , vol. 19, no. 1, pp. 1–27, 2023
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OpenAI, “Gpt-4 technical report,” 2023
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