Simulation of noisy Clifford circuits without fault propagation

Understand

The design and optimization of a large-scale fault-tolerant quantum computer architecture relies extensively on numerical simulations to assess the performance of each component of the architecture.

• The simulation of fault-tolerant gadgets, which are typically implemented by Clifford circuits, is done by sampling circuit faults and propagating them through the circuit to check that they do not corrupt the logical data.
• One may have to repeat this fault propagation trillions of times to extract an accurate estimate of the performance of a fault-tolerant gadget.
• For some specific circuits, such as the standard syndrome extraction circuit for surface codes, we can exploit the natural graph structure of the set of faults to perform a simulation without fault propagation.