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Circuit representation learning aims to obtain neural representations of circuit elements and has emerged as a promising research direction that can be applied to various EDA and logic reasoning tasks.
G. S. Tseitin, “On the complexity of derivation in propositional calculus,” Automation of reasoning: 2: Classical papers on computational logic 1967–1970 , pp. 466–483, 1983
1983
Earlier work this paper cites.
S. Davidson, “Characteristics of the itc’99 benchmark circuits,” in ITSW , 1999
1999
Earlier work this paper cites.
E. I. Goldberg, M. R. Prasad, and R. K. Brayton, “Using sat for combinational equivalence checking,” in Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 . IEEE, 2001, pp. 114–121
2001
Earlier work this paper cites.
A. Kuehlmann, V. Paruthi, F. Krohm, and M. K. Ganai, “Robust boolean reasoning for equivalence checking and functional property verification,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol. 21, no. 12, pp. 1377–1394, 2002
2002
Earlier work this paper cites.
K. L. McMillan, “Interpolation and sat-based model checking,” in Computer Aided Verification: 15th International Conference, CAV 2003, Boulder, CO, USA, July 8-12, 2003. Proceedings 15 . Springer, 2003, pp. 1–13
2003
Earlier work this paper cites.
F. Lu, L.-C. Wang, K.-T. Cheng, and R.-Y. Huang, “A circuit sat solver with signal correlation guided learning,” in 2003 Design, Automation and Test in Europe Conference and Exhibition . IEEE, 2003, pp. 892–897
2003
Earlier work this paper cites.
K. Yang, K.-T. Cheng, and L.-C. Wang, “Trangen: A sat-based atpg for path-oriented transition faults,” in ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No. 04EX753) . IEEE, 2004, pp. 92–97
2004
Earlier work this paper cites.
A. Mishchenko, S. Chatterjee, R. Jiang, and R. K. Brayton, “Fraigs: A unifying representation for logic synthesis and verification,” ERL Technical Report, Tech. Rep., 2005
2005
Earlier work this paper cites.
C. Albrecht, “Iwls 2005 benchmarks,” in IWLS , 2005
2005
Earlier work this paper cites.
Y. Bengio, J. Louradour, R. Collobert, and J. Weston, “Curriculum learning,” in Proceedings of the 26th annual international conference on machine learning , 2009, pp. 41–48
2009
Earlier work this paper cites.
G. Audemard and L. Simon, “Glucose: a solver that predicts learnt clauses quality,” SAT Competition , pp. 7–8, 2009
2009
Earlier work this paper cites.
2014
Earlier work this paper cites.
E. Hoffer and N. Ailon, “Deep metric learning using triplet network,” in Similarity-Based Pattern Recognition: Third International Workshop, SIMBAD 2015, Copenhagen, Denmark, October 12-14, 2015. Proceedings 3 . Springer, 2015, pp. 84–92
2015
Earlier work this paper cites.
L. Amarú, P.-E. Gaillardon, and G. De Micheli, “The epfl combinational benchmark suite,” in IWLS , no. CONF, 2015
2015
Cited alongside, same era.
A. Vaswani, N. Shazeer, N. Parmar, J. Uszkoreit, L. Jones, A. N. Gomez, Ł. Kaiser, and I. Polosukhin, “Attention is all you need,” Advances in neural information processing systems , vol. 30, 2017
2017
Cited alongside, same era.
2017
Cited alongside, same era.
W. Haaswijk, E. Collins, B. Seguin, M. Soeken, F. Kaplan, S. Süsstrunk, and G. De Micheli, “Deep learning for logic optimization algorithms,” in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) . IEEE, 2018, pp. 1–4
2018
Cited alongside, same era.
T. Brown, B. Mann, N. Ryder, M. Subbiah, J. D. Kaplan, P. Dhariwal, A. Neelakantan, P. Shyam, G. Sastry, A. Askell et al. , “Language models are few-shot learners,” Advances in neural information processing systems , vol. 33, pp. 1877–1901, 2020
2020
Later among the works it cites.
A. Mirhoseini, A. Goldie, M. Yazgan, J. W. Jiang, E. Songhori, S. Wang, Y.-J. Lee, E. Johnson, O. Pathak, A. Nazi et al. , “A graph placement methodology for fast chip design,” Nature , vol. 594, no. 7862, pp. 207–212, 2021
2021
Later among the works it cites.
Z. He, Z. Wang, C. Bail, H. Yang, and B. Yu, “Graph learning-based arithmetic block identification,” in 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD) . IEEE, 2021, pp. 1–8
2021
Later among the works it cites.
J. Marques-Silva, I. Lynce, and S. Malik, “Conflict-driven clause learning sat solvers,” in Handbook of satisfiability . IOS press, 2021, pp. 133–182
2021
Later among the works it cites.
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2018
Cited alongside, same era.
Z. Wu, Y. Xiong, S. X. Yu, and D. Lin, “Unsupervised feature learning via non-parametric instance discrimination,” in Proceedings of the IEEE conference on computer vision and pattern recognition , 2018, pp. 3733–3742
2018
Cited alongside, same era.
A. Mishchenko and R. Brayton, “Integrating an aig package, simulator, and sat solver,” in International Workshop on Logic and Synthesis (IWLS) , 2018, pp. 11–16
2018
Cited alongside, same era.
——, “On the glucose sat solver,” International Journal on Artificial Intelligence Tools , vol. 27, no. 01, p. 1840001, 2018
2018
Cited alongside, same era.
W. L. Neto, M. Austin, S. Temple, L. Amaru, X. Tang, and P.-E. Gaillardon, “Lsoracle: A logic synthesis framework driven by artificial intelligence,” in 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) . IEEE, 2019, pp. 1–6
2019
Cited alongside, same era.
A. Fayyazi, S. Shababi, P. Nuzzo, S. Nazarian, and M. Pedram, “Deep learning-based circuit recognition using sparse mapping and level-dependent decaying sum circuit representations,” in 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) . IEEE, 2019, pp. 638–641
2019
Cited alongside, same era.
S. D. QUEUE, “Cadical at the sat race 2019,” SAT RACE 2019 , p. 8, 2019
2019
Cited alongside, same era.
J. Chen, J. Kuang, G. Zhao, D. J.-H. Huang, and E. F. Young, “Pros: A plug-in for routability optimization applied in the state-of-the-art commercial eda tool using deep learning,” in Proceedings of the 39th International Conference on Computer-Aided Design , 2020, pp. 1–8
2020
Cited alongside, same era.
Z. Shi, M. Li, S. Khan, L. Wang, N. Wang, Y. Huang, and Q. Xu, “Deeptpi: Test point insertion with deep reinforcement learning,” in 2022 IEEE International Test Conference (ITC) . IEEE, 2022, pp. 194–203
2022
Later among the works it cites.
J. Huang, H.-L. Zhen, N. Wang, H. Mao, M. Yuan, and Y. Huang, “Neural fault analysis for sat-based atpg,” in 2022 IEEE International Test Conference (ITC) . IEEE, 2022, pp. 36–45
2022
Later among the works it cites.
M. Li, S. Khan, Z. Shi, N. Wang, H. Yu, and Q. Xu, “Deepgate: Learning neural representations of logic gates,” in Proceedings of the 59th ACM/IEEE Design Automation Conference , 2022, pp. 667–672
2022
Later among the works it cites.
Z. Wang, C. Bai, Z. He, G. Zhang, Q. Xu, T.-Y. Ho, B. Yu, and Y. Huang, “Functionality matters in netlist representation learning,” in Proceedings of the 59th ACM/IEEE Design Automation Conference , 2022, pp. 61–66
2022
Later among the works it cites.
K. Zhu, H. Chen, W. J. Turner, G. F. Kokai, P.-H. Wei, D. Z. Pan, and H. Ren, “Tag: Learning circuit spatial embedding from layouts,” in Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design , 2022, pp. 1–9
2022
Later among the works it cites.
2022
Later among the works it cites.
2022
Later among the works it cites.
B. L. Synthesis and V. Group, “Abc: A system for sequential synthesis and verification.” http://www-cad.eecs.berkeley.edu/ãlanmi/abc , 2023
2023
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