Hierarchical memories: Simulating quantum LDPC codes with local gates

Understand

Constant-rate low-density parity-check (LDPC) codes are promising candidates for constructing efficient fault-tolerant quantum memories.

• However, if physical gates are subject to geometric-locality constraints, it becomes challenging to realize these codes.
• In this paper, we construct a new family of $[[N,K,D]]$ codes, referred to as hierarchical codes, that encode a number of logical qubits $K = \Omega(N/\log(N)^2)$.
• The N-th element of this code family is obtained by concatenating a constant-rate quantum LDPC code with a surface code; nearest-neighbor gates in two dimensions are sufficient to implement the corresponding syndrome-extraction circuit and achieve a threshold.