Hardware optimized parity check gates for superconducting surface codes

Understand

Error correcting codes use multi-qubit measurements to realize fault-tolerant quantum logic steps.

• In fact, the resources needed to scale-up fault-tolerant quantum computing hardware are largely set by this task.
• Tailoring next-generation processors for joint measurements, therefore, could result in improvements to speed, accuracy, or cost -- accelerating the development large-scale quantum computers.
• Here, we motivate such explorations by analyzing an unconventional surface code based on multi-body interactions between superconducting transmon qubits.