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Modern computing devices employ High-Bandwidth Memory (HBM) to meet their memory bandwidth requirements.
“Trading off Cache Capacity for Reliability to Enable Low-Voltage Operation”
C. Wilkerson · 2008
Earlier work this paper cites.
“Architecting Phase-Change Memory as a Scalable DRAM Alternative”
B. Lee · 2009
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“Statistical Fault Injection: Quantified Error and Confidence”
R. Leveugle · 2009
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“Scalable High Performance Main Memory System using Phase-Change Memory Technology”
M. Qureshi · 2009
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“Voltage Emergency Prediction: Using Signatures to Reduce Operating Margins”
V. Reddi · 2009
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“Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling”
V. Reddi · 2010
Earlier work this paper cites.
“Reducing Cache Power with Low-Cost, Multi-Bit Error-Correcting Codes”
C. Wilkerson · 2010
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“Energy-Efficient Cache Design Using Variable-Strength Error-Correcting Codes”
A. Alameldeen · 2011
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“Memory Power Management via Dynamic Voltage/Frequency Scaling”
H. David · 2011
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“MemScale: Active Low-power Modes for Main Memory”
Q. Deng · 2011
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“Phase-Change Memory: from Devices to Systems”
M. Qureshi · 2011
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“Error Patterns in MLC NAND Flash Memory: Measurement, Characterization, and Analysis”
Y. Cai · 2012
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“Dynamic Reduction of Voltage Margins by Leveraging On-Chip ECC in Itanium II Processors”
A. Bacha · 2013
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“Error Analysis and Retention-Aware Error Management for NAND Flash Memory”
Y. Cai · 2013
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“Threshold Voltage Distribution in MLC NAND Flash Memory: Characterization, Analysis, and Modeling”
Y. Cai · 2013
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“Evaluating STT-RAM as an Energy-Efficient Main Memory Alternative”
E. Kultursay · 2013
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“GPUWattch: Enabling Energy Optimizations in GPGPUs”
J. Leng · 2013
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“Inside Solid State Drives (SSDs)”
R. Micheloni · 2013
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“Memory Scaling: A Systems Architecture Perspective”
O. Mutlu · 2013
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“Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities”
R. Bertran · 2014
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“HBM: Memory Solution for Bandwidth-Hungry Processors”
D. Lee · 2014
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“Characterizing Application Memory Error Vulnerability to Optimize Datacenter Cost via Heterogeneous-Reliability Memory”
Y. Luo · 2014
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“Read Disturb Errors in MLC NAND Flash Memory: Characterization, Mitigation, and Recovery”
Y. Cai · 2015
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“GPU Voltage Noise: Characterization and Hierarchical Smoothing of Spatial and Temporal Voltage Noise Interference in GPU Architectures”
J. Leng · 2015
Cited alongside, same era.
“Safe Limits on Voltage Reduction Efficiency in GPUs: A Direct Measurement Approach”
J. Leng · 2015
Cited alongside, same era.
“Research Problems and Opportunities in Memory Systems”
O. Mutlu · 2015
Cited alongside, same era.
“HATCH: Hash Table Caching in Hardware for Efficient Relational Join on FPGA”
B. Salami · 2015
Cited alongside, same era.
“Adaptive Guardband Scheduling to Improve System-Level Efficiency of the POWER7+”
Y. Zu · 2015
Cited alongside, same era.
“Simultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost”
D. Lee · 2016
“Aggressive Undervolting of FPGAs: Power & Reliability Trade-offs”
B. Salami · 2018
Later among the works it cites.
“Comprehensive Evaluation of Supply Voltage Underscaling in FPGA On-Chip Memories”
B. Salami · 2018
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“Fault Characterization through FPGA Undervolting: Fault Characterization and Mitigation”
B. Salami · 2018
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“On the Resilience of RTL NN Accelerators: Fault Characterization and Mitigation”
B. Salami · 2018
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“Thundervolt: Enabling Aggressive Voltage Underscaling and Timing Error Resilience for Energy-Efficient Deep Learning Accelerators”
J. Zhang · 2018
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“Voltage-Stacked GPUs: A Control Theory Driven Cross-Layer Solution for Practical Voltage Stacking in GPUs”
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Cited alongside, same era.
“Power and Energy Reduction of Racetrack-based Caches by Exploiting Shared Shift Operations”
S. Nabavi · 2016
Cited alongside, same era.
“Minerva: Enabling low-power, highly-accurate deep neural network accelerators”
B. Reagen · 2016
Cited alongside, same era.
“Error Characterization, Mitigation, and Recovery in Flash-Memory-based Solid-State Drives”
Y. Cai · 2017
Cited alongside, same era.
“Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques”
Y. Cai · 2017
Cited alongside, same era.
In Technical Report, Micron Technology, Inc. , 2017
“Calculating Memory Power for DDR4 SDRAM” · 2017
Cited alongside, same era.
“Understanding Reduced-voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms”
K. Chang · 2017
Cited alongside, same era.
A. Zou · 2018
Later among the works it cites.
“Demystifying Complex Workload-DRAM Interactions: An Experimental Study”
S. Ghose · 2019
Later among the works it cites.
“Modern Hardware Margins: CPUs, GPUs, FPGAs Recent System-Level Studies”
D. Gizopoulos · 2019
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“EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference using Approximate DRAM”
S. Koppula · 2019
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“Fast Voltage Transients on FPGAs: Impact and Mitigation Strategies”
S. Linda · 2019
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“A Novel FPGA-Based High Throughput Accelerator For Binary Search Trees”
O. Melikoglu · 2019
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“Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs”
G. Papadimitriou · 2019
Later among the works it cites.
“Evaluating Built-in ECC of FPGA On-Chip Memories for the Mitigation of Undervolting Faults”
B. Salami · 2019
Later among the works it cites.
“Virtex Ultrascale+ HBM FPGA: a Revolutionary Increase in Memory Performance (WP485)”
M. Wissolik · 2019
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“SysScale: Exploiting Multi-Domain Dynamic Voltage and Frequency Scaling for Energy-Efficient Mobile Processors”
J. Haj-Yahya · 2020
Closest in time.
JEDEC Solid State Technology Association
“High-Bandwidth Memory (HBM) DRAM”, 2020 · 2020
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JEDEC Solid State Technology Association
“Low-Power Double Data Rate 4 (LPDDR4)”, 2020 · 2020
Closest in time.
Nvidia Corporation
“NVIDIA A100 Tensor Core GPU: Unprecedented Acceleration at Every Scale”, 2020 · 2020
Closest in time.
Micron Technology, Inc
“RLDRAM Memory”, 2020 · 2020
Closest in time.
“An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration”
B. Salami · 2020
Closest in time.
Xilinx, Inc
“Virtex UltraScale+ HBM VCU128-ES1 FPGA evaluation kit”, 2020 · 2020
Closest in time.
“A Modern Primer on Processing in Memory”
O. Mutlu · 2021
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