A Very Compact Embedded CNN Processor Design Based on Logarithmic Computing

Understand

In this paper, we propose a very compact embedded CNN processor design based on a modified logarithmic computing method using very low bit-width representation.

• Our high-quality CNN processor can easily fit into edge devices.
• For Yolov2, our processing circuit takes only 0.15 mm2 using TSMC 40 nm cell library.
• The key idea is to constrain the activation and weight values of all layers uniformly to be within the range [-1, 1] and produce low bit-width logarithmic representation.