Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators

Understand

Co-exploration of neural architectures and hardware design is promising to simultaneously optimize network accuracy and hardware efficiency.

• However, state-of-the-art neural architecture search algorithms for the co-exploration are dedicated for the conventional von-neumann computing architecture, whose performance is heavily limited by the well-known memory wall.
• In this paper, we are the first to bring the computing-in-memory architecture, which can easily transcend the memory wall, to interplay with the neural architecture search, aiming to find the most efficient neural architectures with high network accuracy and maximized hardware efficiency.
• Such a novel combination makes opportunities to boost performance, but also brings a bunch of challenges.