CNOT circuit extraction for topologically-constrained quantum memories

Understand

Many physical implementations of quantum computers impose stringent memory constraints in which 2-qubit operations can only be performed between qubits which are nearest neighbours in a lattice or graph structure.

• Hence, before a computation can be run on such a device, it must be mapped onto the physical architecture.
• That is, logical qubits must be assigned physical locations in the quantum memory, and the circuit must be replaced by an equivalent one containing only operations between nearest neighbours.
• In this paper, we give a new technique for quantum circuit mapping (a.k.a.