An Efficient Dispatcher for Large Scale GraphProcessing on OpenCL-based FPGAs

Understand

High parallel framework has been proved to be very suitable for graph processing.

• There are various work to optimize the implementation in FPGAs, a pipeline parallel device.
• The key to make use of the parallel performance of FPGAs is to process graph data in pipeline model and take advantage of on-chip memory to realize necessary locality process.
• This paper proposes a modularize graph processing framework, which focus on the whole executing procedure with the extremely different degree of parallelism.