High Coherence Plane Breaking Packaging for Superconducting Qubits

Understand

We demonstrate a pogo pin package for a superconducting quantum processor specifically designed with a nontrivial layout topology (e.g., a center qubit that cannot be accessed from the sides of the chip).

• Two experiments on two nominally identical superconducting quantum processors in pogo packages, which use commercially available parts and require modest machining tolerances, are performed at low temperature (10 mK) in a dilution refrigerator and both found to behave comparably to processors in standard planar packages with wirebonds where control and readout signals come in from the edges.
• Single- and two-qubit gate errors are also characterized via randomized benchmarking.
• More detailed crosstalk measurements indicate levels of crosstalk less than -40 dB at the qubit frequencies, opening the possibility of integration with extensible qubit architectures.