Implications of Electronics Constraints for Solid-State Quantum Error Correction and Quantum Circuit Failure Probability

Understand

In this paper we present the impact of classical electronics constraints on a solid-state quantum dot logical qubit architecture.

• Constraints due to routing density, bandwidth allocation, signal timing, and thermally aware placement of classical supporting electronics significantly affect the quantum error correction circuit's error rate.
• We analyze one level of a quantum error correction circuit using nine data qubits in a Bacon-Shor code configured as a quantum memory.
• A hypothetical silicon double quantum dot quantum bit (qubit) is used as the fundamental element.